1. Field of the Invention
This invention relates to the filed of semiconductor devices and more specifically to an etchback process designed to etch a blanket layer of a refractory metal such as tungsten (W).
2. Prior Art
In the manufacture of semiconductor devices, there is a need to make electrical contact to certain regions of the device. Normally, it is necessary to make contact to device regions underlying a dielectric on the surface of the silicon substrate by first forming an opening or via in the dielectric over the region to be contacted and next depositing a conductive material over the substrate surface, including the opening or via. This conductive material is then patterned for connecting different parts of the integrated surface (that is, to form "interconnects" or "interconnect lines"). Traditionally, sputtered aluminum (Al) has been used as the conductive material. Typically, a blanket layer of aluminum is deposited on the surface of the silicon substrate covering any overlying dielectric as well as device regions exposed by openings in the dielectric. This is followed by a masking step which leaves photoresist covering the openings or vias through the dielectric layer to the region to be contacted and the regions to be used as interconnects. An etch step removes the aluminum from the areas not covered by photoresist, leaving the aluminum which fills the openings or vias and forms the interconnect lines, thereby making electrical contact to the desired region.
As geometries have shrunk to submicron levels and devices have become more densely packed on the substrate surface, the openings or vias to the device regions to be contacted have increasingly greater aspect ratios (ratio of height to width). Aluminum deposition alone has proven to be inadequate in devices with high aspect ratios. The problems encountered include poor step coverage, poor contact integrity, and inadequate planarity.
To overcome these shortcomings, tungsten and other refractory metals are being used as a contact filling for devices with submicron contacts before aluminum deposition and patterning. For example, a blanket tungsten layer (tungsten "film") is deposited followed by a blanket etchback to remove deposited tungsten from the surface of the substrate, leaving a tungsten filling or plug in the contact openings or via. The aluminum layer is then deposited, covering the substrate surface including the filled contact vias. This aluminum film is then patterned and etched to form the interconnects.
A problem encountered with the tungsten process is the "micro-loading effect" where the tungsten etch rate drastically accelerates in the contact opening when the bulk of the film has been removed from the surface of the silicon substrate (that is, when the film "clears"). The result is that the contact fillings or plugs are recessed below the surface of the dielectric and are sometimes completely removed by the end of the etch. Because of the micro-loading effect, it is extremely difficult to obtain uniform contact fillings while ensuring that the bulk of the metal is completely removed from all areas of the substrate. Slight non-uniformities in the metal thickness or etching process over the surface of the wafers will cause the bulk metal on the surface of the substrate to be etched in some areas of the substrate before others. If even a slight overetch is employed to ensure complete etching of the bulk metal from all areas of the surface, the metal filling the contact openings will begin to etch rapidly in those regions of the surface where the bulk metal clears first. This results in extreme variations or non-uniformities in the filling levels of the contact openings. The filling in the contact openings located in the area where the bulk metal cleared last will be completely unetched--that is, the contact openings in this area will be completely filled with tungsten, while the filling in the contact openings in areas where the bulk metal cleared earlier will be etched to different extents--some will be recessed slightly below the surface, other will be recessed to greater depths and some will be missing entirely.
What is needed is an etchback process which completely removes the bulk metal from the surface of the wafer but does not result in partially or completely etched away contact fillings due to the micro-loading effect.
Various etching methods have been described to overcome the micro-loading effect. For example in "A Study of Tungsten Etchback for Contact and Via Fill Applications" Proc. IEEE V-MIC conf. p 193 (Jun. 15-16, 1987), a three step etching process utilizing an aluminum underlayer and a gas chemistry including CBrF.sub.3 is described. There are several drawbacks to this method. The use of an aluminum underlayer as an etch stop requires additional processing steps. The use of CBrF.sub.3 for the etching gas can lead to polymer formation in the etcher chamber, resulting in increased equipment maintenance requirements. The low etch rate of one thousand to three thousand angstroms per minute leads to a low throughput, making the process undesirable for mass IC production.
Another method of avoiding the micro-loading effect is described in "Layer Tungsten and Its Applications for VLSI Interconnects" IEEE IEDM Technical Digest, p 462 (1988). The method there described is to interrupt the tungsten deposition and deposit thin interlayers of polysilicon. A tungsten layer of approximately one thousand angstroms is deposited followed by a polysilicon layer of about 150 angstroms. This is repeated until the desired final tungsten thickness is reached. The tungsten layers are then removed by an etchback. The etch is stopped at the last polysilicon layer, leaving the first deposited metal layer intact. Although the contact fillings remain, with no micro-loading, this process is not useful for IC production since the last layer of tungsten which is not etched from the surface of the substrate will cause short circuits between contacts, if not etched during the subsequent aluminum etch.
It is also well known to planarize the surface with photoresist after tungsten deposition and employ an etch that etches photoresist and tungsten at approximately the same rate. See "Plasma Etching Methods for the Formation of Planarized Tungsten Plugs Used in Multilevel VLSI Metallizations" J. Electrochem. Soc., Vol. 135. p 936 (1988) and "Planarized Contact Process for Submicron VLSI Devices Using Resist Etch Back of CVD Tungsten" ECS Fall Meeting, Extended Abstract, Vol. 251, p 356 (1988). When utilizing this method, it is critical to maintain a uniform etch process so that the entire surface clears at the same time. If some areas of the surface clear before other areas, the micro-loading effect will cause recessed or missing contact fillings in the area first cleared. Maintaining such a uniform etch repeatably is difficult, even in single wafer etchers where control of the etching process is generally good. Additionally, photoresist or organic residue frequently remain at the top of the contact filling which can be the source of contamination during later processing steps, leading to reliability problems in the devices.
Finally, a sacrificial Si.sub.3 N.sub.4 layer, deposited before metal deposition, is known to reduce the micro-loading effect. See "A Novel Tungsten Etchback Scheme" Proc. IEEE V-MIC conf. p 129 (Jun. 12-13, 1989). The disadvantage of the scheme described therein is that process complexity is increased by adding the Si.sub.3 N.sub.4 deposition and removal steps. The Si.sub.3 N.sub.4 removal requires the use of phosphoric acid. Phosphoric acid is generally high in particle content and can cause contamination leading to device reliability problems. Because phosphoric acid is highly viscous, efficient filtration is difficult and expensive. Furthermore, some tungsten residue often remains on the Si.sub.3 N.sub.4 layer after etchback. This tungsten residue masks portions of the Si.sub.3 N.sub.4 layer during the Si.sub.3 N.sub.4 removal step, leaving islands of Si.sub.3 N.sub.4 covered with tungsten remaining on the substrate surface after the Si.sub.3 N.sub.4 removal.
What is needed is an etchback process that does not suffer from the micro-loading effect, that is, a process which can ensure complete removal of the bulk metal from the surface of the substrate while leaving the contact fillings uniform. It is further desirable that the etching process does not add additional steps or complexities to the process, and has a sufficiently low throughput time to allow for high volume IC production.